FPGA/ASIC & SDR Engineer

About the role

OQ Technology is seeking a talented FPGA/ASIC & SDR Engineer to join its payload team in Luxembourg. The role involves hands‑on design, implementation, integration, and verification of FPGA firmware, SDR‑based systems, and ASIC‑level contributions for satellite radio applications.

Key responsibilities

• Design and implement FPGA firmware in VHDL, Verilog or SystemVerilog for PHY, baseband and digital RF processing functions.
• Translate telecommunication algorithms from MATLAB or C/C++ reference models into bit‑accurate FPGA implementations.
• Apply synthesis, place‑and‑route, and timing constraints using Vivado and Vitis for Xilinx/AMD Zynq, UltraScale+, Kintex, Virtex and Artix families.
• Develop and run simulation testbenches for functional and regression verification before hardware integration.
• Lead FPGA bring‑up activities, including PL/PS integration over AXI, peripheral commissioning and integration with embedded Linux or bare‑metal software.
• Perform hardware debugging with JTAG, ILA, oscilloscopes, spectrum and network analysers.
• Execute test and validation procedures for functional and performance verification of digital transceivers and baseband processing.

Required profile

• Proven experience in hands‑on FPGA, SDR and ASIC design for high‑performance digital communication systems.
• Ability to work across the full development lifecycle from RTL implementation to laboratory testing and formal validation.
• Strong problem‑solving skills and capability to operate under senior technical direction.

Required skills

• VHDL, Verilog, SystemVerilog
• Xilinx Zynq, UltraScale+, Kintex, Virtex, Artix device families
• Vivado and Vitis toolchains
• MATLAB, C/C++ for algorithm development
• AXI interconnect integration
• Embedded Linux and bare‑metal software integration
• JTAG, Integrated Logic Analyzer (ILA)
• Oscilloscope, spectrum analyser, network analyser
• Digital RF processing, modulation/demodulation, FEC encoding/decoding, synchronization, data‑path logic
• RTL simulation, hardware bring‑up, laboratory testing, formal validation