High-Speed PCB Design Engineer
Exobiosphere · Esch-sur-Alzette
Job description
About the role
We are seeking a High‑Speed PCB Design Engineer to lead the design of spacecraft payload electronics from concept through layout release. You will work closely with multidisciplinary teams to ensure robust, high‑performance hardware that meets stringent aerospace standards.
Key responsibilities
- Own the complete high‑speed PCB design process for payload electronics, defining specifications and delivering layout releases.
- Design PCBs to ECSS and IPC Class 3 requirements, including stack‑up definition, controlled‑impedance routing, and manufacturability constraints.
- Perform signal‑ and power‑integrity analyses (impedance profiles, eye diagrams, return loss, crosstalk, PDN impedance) and translate results into layout constraints.
- Select and qualify high‑speed components (connectors, SerDes, DDR, USB, PCIe) and manage COTS/HiRel part qualification.
- Support electrical test campaigns (functional, performance, EMC, ESD) and collaborate with test and system teams.
- Assess reliability, failure modes, and safety of components and interconnects; contribute to design reviews and risk mitigation.
- Troubleshoot design issues during development, bring‑up, testing, and integration to ensure timely payload delivery.
- Coordinate with mechanical, thermal, and systems engineering for seamless module integration.
Required profile
- Master’s degree in Electronics Engineering or equivalent professional experience.
- Minimum 5 years of PCB design experience, preferably in high‑speed or aerospace applications.
- Proven expertise with Altium Designer and high‑speed layout practices.
- Strong documentation skills (schematics, layout constraints, stack‑ups, review packages, engineering reports).
- Analytical mindset with hands‑on bring‑up and debug experience.
Required skills
- Altium Designer
- Controlled‑impedance routing (microstrip/stripline)
- Differential pair routing, length matching, propagation‑delay management
- Parasitics modeling, via/return‑path optimization
- Crosstalk minimization and EMC‑aware layout
- Signal‑integrity and power‑integrity analysis
- Component selection for high‑speed interfaces (SerDes, DDR, USB, PCIe)
- Test automation scripting (Python)
- Basic proficiency in C, VHDL/Verilog
- Debug tools: JTAG, logic and protocol analyzers
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Published 1 month ago
Expires 1 day from now
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Exobiosphere
Esch-sur-Alzette
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