FPGA/ASIC & SDR Engineer

About the role

OQ Technology is seeking a talented FPGA/ASIC & SDR Engineer to join its payload team in Luxembourg. You will work on the design, implementation, integration and verification of FPGA firmware, SDR‑based systems and ASIC contributions for satellite radio applications.

Key responsibilities

• Design and implement FPGA firmware in VHDL, Verilog or SystemVerilog for PHY, baseband and digital RF processing functions.
• Translate telecommunication algorithms from MATLAB, C or C++ reference models into bit‑accurate FPGA implementations.
• Apply synthesis, place‑and‑route and timing constraints using Vivado and Vitis for Xilinx/AMD Zynq, UltraScale+, Kintex, Virtex and Artix devices.
• Develop and run simulation testbenches for functional and regression verification before hardware integration.
• Lead FPGA bring‑up activities, including PL/PS integration over AXI, peripheral commissioning and embedded‑Linux or bare‑metal software integration.
• Perform hardware debugging with JTAG, integrated logic analyzers, oscilloscopes, spectrum and network analysers.

Required profile

• Hands‑on experience designing FPGA firmware for digital transceivers and satellite payload applications.
• Ability to work under senior technical direction and collaborate across hardware and software teams.
• Familiarity with ASIC‑level design contributions when required.
• Strong problem‑solving skills for hardware bring‑up and validation.

Required skills

• VHDL, Verilog, SystemVerilog
• Xilinx/AMD Zynq, UltraScale+, Kintex, Virtex, Artix families
• Vivado and Vitis toolchains
• MATLAB, C, C++
• AXI interconnect, embedded Linux, bare‑metal development
• JTAG, logic analyzer, oscilloscope, spectrum analyzer, network analyzer