Senior HDL Designer

About the role

We are looking for a Senior HDL Designer to lead the development of FPGA configurations for high‑speed image processing, real‑time process control and software‑defined radio systems. The role bridges system‑level specifications and hardware implementation, ensuring robust, high‑performance designs that meet our long‑term reliability goals.

Key responsibilities

• Translate system‑level requirements into RTL specifications and select appropriate FPGA devices.
• Develop and verify RTL code and test benches using SystemVerilog and/or VHDL.
• Synthesize designs, perform placement and routing, and achieve timing closure on physical prototypes.
• Optimize implementations for cost, performance and technological constraints.
• Collaborate with hardware and software engineers to deliver integrated system solutions.
• Debug prototypes using logic analyzers, oscilloscopes and integrated logic analyzer (ILA) tools.

Required profile

• Bachelor’s or Master’s degree in Electronic Engineering or related field.
• Minimum 5 years of experience integrating FPGA designs into digital or mixed‑signal systems.
• Strong knowledge of digital interface protocols such as AXI, SPI and PCIe.
• Experience with signal‑processing algorithms (FIR, IIR) for RF, video or other digital signals.
• Ability to work in diverse engineering teams and hold NATO‑eligible clearance or be from a NATO member/partner country.

Required skills

• SystemVerilog
• VHDL
• RTL design
• FPGA synthesis and timing closure
• AXI‑family protocols
• SPI protocol
• PCIe protocol
• FIR and IIR filter design
• Logic analyzers and oscilloscopes
• Integrated Logic Analyzer (ILA)
• Git version control